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"FIFO" references for the Electrical Engineer
Entries 1 through 3 of 3 were returned.
Name Type Details
Asynchronous Wrapper for Globally Asynchronous Locally Synchronous Systems Thesis Description: 45 page thesis with the goal of building an asynchronous wrapper in VHDL and then testing same in an FPGA.
Globally-Asynchronous, Locally-Synchronous Wrapper Configurations For Point-To-Point and Multi-Point Data Communication Thesis Description: 167 page Master's Thesis intended as an introduction to GALS design techniques.
Algorithms for programmers: ideas and source code Book Description: The cover page notes that "this is a work in progress". Pretty impressive considering this text is already 792 pages long!

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