| Name | Type | Details |
| OPENCORES.ORG | Web-Page |
Description: The opencores website states: "OpenCores is a loose collection of people who are interested in developing hardware, with a similar ethos to the free software movement. Currently the emphasis is on digital modules called 'cores', since FPGAs have reduced the incremental cost of a core to approximately zero. "
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Author(s): Various License: Other Format: HTML Price: free URL: http://www.opencores.org/ Limitations: License varies for each piece of IP on the site. ReviewText: Public IP reuse is still in its infancy. Here is one site dedicated to moving to the next stage. Keywords: SoC , opencores , IP , FPGA , arithmetic core , communiction controller , microprocessor , DSP core , ECC Submitter: EE HomePage Editorial Staff Affiliation: None xml_ID: 1150378968 (single entry page) |
| Basics of Design | Tutorial |
Description: Electronic Design magazine occasionally includes a glossy insert entitled: "basics of Design". Each is corporate sponsored, and provides a basic tuturial on some design task. The collection is available at this location on the Electronic Design web site.
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Author(s): Various Corporate License: Commercial Format: Paper, HTML, PDF Price: free URL: http://www.elecdesign.com/ Departments/ Index.cfm? AD=1& amp;DepartmentID=24 Limitations: These are short, basic, tutorials. You won't be an expert after reading one. But it may be enough to wet your appetite to learn more about a subject. These ARE vendor-sponsored, so don't be surprised to see that month's sponsor listed somewhere in the article. ReviewText: At the time of this entry, topics include:
Keywords: EDA , ADC , DAC , wireless , filters , SoC , RF , FPGA , microprocessor , tutorials , Op Amps , packaging , DC-DC conversion , ASICs , power systems , programmable logic , power management , LVDS , IEEE 802.3af , VoIP , lab measurement Submitter: EE HomePage Editorial Staff Affiliation: Reader xml_ID: 1151970790 (single entry page) |
| Embedded Technology Journal | Magazine/Journal |
Description: Webzine on embedded technology.
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Author(s): Various License: Commercial Format: PDF, Video Price: Free URL: http://embeddedtechjournal.com/ ReviewText: Their article archive sorts feature articles under the following headings:
Keywords: wireless , SoC , FPGA , ASIC , processors , System-On-Chip , embedded design , development/debug environments , open source , memory , RTOS Submitter: EE HomePage Editorial Staff Affiliation: None xml_ID: 1177902095 (single entry page) |
| Name | Type | Details |
| Electric VLSI Design System | IC Layout, Schematic Entry, Verilog, VHDL & FPGA Design |
Description: From their website: "The ElectricTM VLSI Design System is a complete Electronic Design Automation (EDA) system that can handle many forms of circuit design".
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License: Open Source, GNU or similar Price: Free URL: http://www.staticfreesoft.com/ index.html OSs: Windows Limitations: Java-based, so should run on any system with Java 1.3 or higher. ReviewText: They have an accompanying online text book at http://www.rulabinsky.com/cavd/ . Keywords: Verilog , VHDL , IC , FPGA , layout , schematic Submitter: EE HomePage Editorial Staff Affiliation: None xml_ID: 1145133163 (single entry page) |
| Quartus II Web Edition Software from Altera | CPLD & FPGA Design Software |
Description: Like many vendors, Altera has both free and subscription versions of their design software available. Check their online comparison chart to see if the free version will suit your needs.
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License: Commercial Price: Free URL: https://www.altera.com/ support/ software/ download/ altera_design/ quartus_we/ dnl-quartus_we.jsp OSs: Windows Limitations: You have to renew the license after 150 days with the free version. ReviewText: See also the Quartus Software Support page on Altera's site for lots of good documentation and training materials. Keywords: Verilog , HDL , VHDL , STA , simulation , FPGA , synthesis , place & route , CAD , schematic capture , formal verification , ModelSim , floorplanning , CPLD Submitter: EE HomePage Editorial Staff Affiliation: None xml_ID: 1180058479 (single entry page) |
| Libero FPGA Integrated Development Environment | Actel Integrated IDE for FPGA design |
Description: Actel's website states: "Libero Integrated Design Environment (IDE) is Actel's comprehensive software toolset for designing with all Actel FPGAs. From schematic and/or HDL design, synthesis and simulation, through floorplanning, place and route, timing constraints and analysis, power analysis, and program file generation."
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License: Commercial Price: 1 year eval license is free URL: http://www.actel.com/ download/ default.aspx OSs: Windows, Linux Limitations: Node-locked 1 year evaluation license is available from the Actel website. It took about 5 minutes for us to register and start installing the software. ReviewText: Includes professional tools for design entry (Verilog, VHDL and schematic), synthesis, simulation and more. Keywords: Verilog , VHDL , FPGA , synthesis , place & route , Actel , schematic , ModelSim , Synplify , Libero Submitter: EE HomePage Editorial Staff Affiliation: None xml_ID: 1176259815 (single entry page) |
No matching Orgs were found.