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"HDL" references for the Electrical Engineer
Entries 1 through 11 of 11 were returned.
Name Type Details
EDA Industry Working Groups Web-Site Description: A one page summary of various EDA Industry Working groups.
Project Veripage Web-Site Description: Web site with a variety of resources for Verilog and System Verilog users.
Verilog Links from ASIC World.com Web-Site Description: Another great site for anyone wanting to learn more about Verilog.
Verilog HDL On-line Quick Reference Web-Page Description: A concise summary of the language by Stuart Sutherland. Can be viewed online or downloaded.
European Space Agency VHDL Modelling Guidelines Specification Description: Document # ASIC/001, Issue 1, September 1994. This 50 page PDF outlines modelling guidelines at use at the European Space Research and Technology centre.
OVI Verilog HDL LRM Specification Description: This is Version 1.0 of the Verilog Language Reference Manual published in November, 1991. It has been superceded by the IEEE specifications.
Unified Power Format Specification Description: From the UPF spec: "UPF provides the ability for electronic systems to be designed with power as a key consideration early in the process. It accomplishes this through the ability to allow the specification of implementation-relevant power information early in the design process RTL (register transfer level) or earlier."
Principles of Top-Down Mixed-Signal Design White Paper Description: This 31 page whitepaper provides an overview of top-down mixed-signal design.
The VHDL Cookbook Book Description: This is the first edition of the text. The 111 page PDF First Edition is dated July, 1990 and was apparently put online by the author (the PDF has a couple of comments to that effect).
Altium VHDL Language Reference Book Description: Altium has a 196 page VHDL Language Reference Manual available for download on their site. This reference discusses IEEE Standard 1164 and 1076.3. PDF bookmarks take you right to the VHDL keyword you're interested in.
Introduction to Verilog Book Description: This is a very nice 33-page introduction to Verilog with lots of examples.

"HDL" related tools for the Electrical Engineer
Entries 1 through 4 of 4 were returned.
Name Type Details
SynaptiCAD Verilog simulator, timing diagrammer, etc. Description: SynaptiCAD makes a family of CAD tools for use on Linux, Solaris & Windows. Current products include:
  • TestBencher
  • BugHunter
  • VeriLogger
  • Waveformer
  • Timing Diagrammer
  • HDL Tranlators
  • GigaWave Viewer
  • HDL Companion
Veriwell Verilog Simulator Verilog simulator Description: Available in source format from SourceForge.
GEZEL cycle-true HDL Description: The GEZEL website defines GEZEL as "a language and design environment for the exploration, simulation and implementation of domain-specific micro-architectures. GEZEL provides a hardware description language, called GEZEL, and a simulation engine for that language, written in C++."
Quartus II Web Edition Software from Altera CPLD & FPGA Design Software Description: Like many vendors, Altera has both free and subscription versions of their design software available. Check their online comparison chart to see if the free version will suit your needs.

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