| Name | Type | Details |
| Asynchronous Techniques for System-On-Chip Design | Tutorial |
Description: An invited paper from the June 2006 Proceedings of the IEEE.
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Author(s): Martin, Alain J. & Nystrom, Mika License: PublicDomain Format: PDF Price: Free URL: http://www.async.caltech.edu/ Pubs/ PDF/ 2006_ieee_soc.pdf ReviewText: 32 pages long, looks like a great introduction to the topic. Keywords: SoC , GALS , asynchronous logic , globally asynchronous locally synchronous , System-On-Chip , dual rail logic , PCHB , QDI , synchronizer Submitter: EE HomePage Editorial Staff Affiliation: None xml_ID: 1170128019 (single entry page) |
| Embedded Technology Journal | Magazine/Journal |
Description: Webzine on embedded technology.
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Author(s): Various License: Commercial Format: PDF, Video Price: Free URL: http://embeddedtechjournal.com/ ReviewText: Their article archive sorts feature articles under the following headings:
Keywords: wireless , SoC , FPGA , ASIC , processors , System-On-Chip , embedded design , development/debug environments , open source , memory , RTOS Submitter: EE HomePage Editorial Staff Affiliation: None xml_ID: 1177902095 (single entry page) |
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