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| Name | Type | Details |
| Veriwell Verilog Simulator | Verilog simulator |
Description: Available in source format from SourceForge.
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License: Open Source, GNU or similar Price: free download URL: http://sourceforge.net/ projects/ veriwell OSs: Source Available Limitations: The README in the source distribution notes: "It is compliant to verilog 95, but does not fully support it. The most notable missing feature is the support for strengths." ReviewText: Supports nearly all of IEEE 1364-1995 and includes PLI 1.0 support. You might like to checkout a 2005 interview with the developer by EE Times. Keywords: Verilog , HDL , simulator , PLI , SourceForge , Veriwell Submitter: EE HomePage Editorial Staff Affiliation: None xml_ID: 1150510815 (single entry page) |
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