|Standby Power Management Architecture for Deep-Submicron Systems||Thesis||
Description: From the introduction of this 2006 PhD Thesis from the University of California at Berkeley: "Power reduction is critical for portable devices to maximize battery life and potentially
to enable operation on scavenged energy. Historically, the focus has been on reducing
dynamic power consumption, since that is where the most power was spent. As process
dimensions shrink further toward deep-submicron, traditional methods of dynamic power
reduction are becoming less effective due to the increased impact of standby power. Circuits and techniques for reducing standby power consumption are becoming increasingly
common, but these methods are currently rather ad-hoc and lack a formalized method for
inclusion in a power-managed system. This thesis presents a scalable architecture that
reduces standby power through the design and composition of power-aware subsystems."
Author(s): Sheets, Michael Alan
URL: http://www.eecs.berkeley.edu/ Pubs/ TechRpts/ 2006/ EECS-2006-70.html
ReviewText: Contents include:
Keywords: power , CMOS , power management , leakage , dynamic power , static power , subthreshold leakage
Submitter: EE HomePage Editorial Staff
xml_ID: 1189356936 (single entry page)
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