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"synthesis" references for the Electrical Engineer
Entries 1 through 2 of 2 were returned.
Name Type Details
All My Xs Come From Texas . . . Not!! White Paper Description: The title is irresistable, and the topic - avoiding unknowns in your Verilog simulations - is worthwhile too.
Application-Specific Integrated Circuits Book Description: This text (offered online by edatoolscafe.com) covers the basics of ASIC technologies.

"synthesis" related tools for the Electrical Engineer
Entries 1 through 4 of 4 were returned.
Name Type Details
SPARK C-to-VHDL high-level synthesis framework High level synthesis Description: "SPARK takes behavioral ANSI-C code as input, schedules it using speculative code motions and loop transformations, runs an interconnect-minimizing resource binding pass and generates a finite state machine for the scheduled design graph. Finally, a backend code generation pass outputs synthesizable register-transfer level (RTL) VHDL. This VHDL can then by synthesized using logic synthesis tools into an ASIC or by mapped onto a FPGA. "
C to Verilog High level synthesis Description: C to Verilog is an easy to use web-based service which accepts a C language description of your datapath and generates synthesizable Verilog output.
Quartus II Web Edition Software from Altera CPLD & FPGA Design Software Description: Like many vendors, Altera has both free and subscription versions of their design software available. Check their online comparison chart to see if the free version will suit your needs.
Libero FPGA Integrated Development Environment Actel Integrated IDE for FPGA design Description: Actel's website states: "Libero Integrated Design Environment (IDE) is Actel's comprehensive software toolset for designing with all Actel FPGAs. From schematic and/or HDL design, synthesis and simulation, through floorplanning, place and route, timing constraints and analysis, power analysis, and program file generation."

"synthesis" related organizations for the Electrical Engineer
Entries 1 through 1 of 1 were returned.
Name Type Details
RASSP Consortium Description: From their website: "RASSP was a major DARPA/Tri-Service initiative to reinvent the process by which embedded digital signal processors were developed. The goal was a four-fold reduction in the time from concept to fielded prototype on both new designs and design upgrades, with similar improvements in life cycle cost, quality and supportability. " RASSP subjects include VHDL, sardware-software codesign, synthesis, test and more.