Where EEs Navigate A Changing World.
Globe
"verification" references for the Electrical Engineer
Entries 1 through 1 of 1 were returned.
Name Type Details
Open Verification Methodology Specification Description: Mentor Graphics and Cadence Design Systems collaborated on the "Open Verification Methodology", which they have now offered up for public consumption. The OVM website states "The OVM is based on the IEEE 1800 SystemVerilog standard and supports design and verification engineers developing advanced verification environments that offer higher levels of integration and portability of Verification IP. The methodology is non-vendor specific and is interoperable with multiple languages and simulators. The OVM is fully open, and includes a robust class library and source code that is available for download."

"verification" related tools for the Electrical Engineer
Entries 1 through 1 of 1 were returned.
Name Type Details
Gameplan Verification Planner Description: "GamePlan Verification Planner assists users in creating structured verification plans and tracking verification progress over the entire verification cycle."

No matching Orgs were found.