| Name | EntryDate | Details |
| Techniques for low power at the system level | 2006-08-26 12:26:35 |
Description: "This article outlines key factors in designing for low power and energy based on system-level strategies and techniques and highlights how ESL synthesis facilitates and automates many of the tasks involved."
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Author(s): Harper, George License: Commercial Type: Article Format: Paper, HTML Price: free URL: http://www.edatechforum.com/ journal/ june2006/ techniques_for_low_power.cfm Keywords: ESL , low-power , clock gating , voltage scaling Submitter: EE HomePage Editorial Staff Affiliation: Reader xml_ID: 1156616795 (single entry page) |
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