| Name | EntryDate | Details |
| All My Xs Come From Texas . . . Not!! | 2006-10-01 19:12:10 |
Description: The title is irresistable, and the topic - avoiding unknowns in your Verilog simulations - is worthwhile too. Author(s): Weber, Matt & Pecor, Jason License: Commercial Type: White Paper Format: PDF Price: free URL: http://www.siliconlogic.com/ pdfs/ GateSim_sanjose04.pdf ReviewText: 20 page white paper devoted to helping you to clean up your simulations. This paper is hands on and straight to the point. Keywords: Verilog , synthesis , SDF , specify blocks , X propagation , timing violations , multicycle paths Submitter: EE HomePage Editorial Staff Affiliation: None xml_ID: 1159755130 (single entry page) |
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